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03 / CORE ARCHITECTURE

One RXU is small; NLM scales by replication.

A fabric of locally connected Reduction Execution Units keeps state close, exposes independent work, and grows without changing the programming model.

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INSIDE ONE RXU

Local state. Local rules. Distributed scale.

  • LOCAL SRAMStores graph nodes and active pairs close to execution.
  • RXRUPerforms topology rewrites when local interactions are ready.
  • NUMERICAL ALUExecutes floating-point and integer primitives on the same fabric.
  • FABRIC PORTConnects RXUs with point-to-point links for distributed scale.
NLM fabric and the components inside one RXU
FPGA v1: synchronous, ~100 MHz, few RXUs · ASIC-scale NLM: GHz-class, local clocks, large fabric
16,384

RXUs in the modeled design point

1.5 GHz

architecture target frequency

9.8T/s

modeled local reductions at 40% utilization

Architecture targets from the current public investor deck; these are design-point projections, not measured silicon results.